Control Bus Definition

In computer architectures, a control bus is part of the computer bus (the physical connection), which is used by the CPU to communicate with other devices within the computer. The control bus transmits commands from the CPU and returns a status signal from the device.

Other buses are:

* Data bus.

* Address bus.

Control bus vs data bus vs address bus

While the address bus carries information about what device the CPU is communicating with, the data bus carries the data that is actually being processed, while the control bus carries commands from the CPU and returns signals from the CPU. status from the device.

In other words, the control bus is the one that manages the use and access to the data and address lines. These lines are shared by all components, therefore there must be mechanisms that control them to avoid information collisions. Therefore the control signals transmit both commands and timing information between the modules.

Control lines the control bus

The control lines are those in charge of sending arbitration signals between the devices. Among the most important are the interrupt lines, DMA, and status flags.

The number and type of lines on the control bus varies depending on the microprocessor. But some basic ones are:

– Read or Read: A single line that when activated (logical zero) indicates that the device is being read by the CPU.

– Write or Write: A single line that when activated (logical zero) indicates that the device is being written by the CPU.

– Byte enable: A group of lines indicating the size of the data (8, 16, 32, 64 bytes).

There are also other lines that may or may not be present, depending on the microprocessor used:

– Transfer ACK («acknowledgement») or acknowledgment of receipt: Provides information indicating that the data has been read by the device.

– Bus request or bus request: Indicates that a device is requesting the use of the data bus.

– Bus grant or bus concession: Indicates that the CPU has granted access to the bus.

– Interrupt request or interrupt request: A device with lower priority is requesting access to the CPU.

– Clock signals: The signal on this line is used to synchronize data between the CPU and a device.

– Reset or restart: If this line is activated, the CPU will perform a hard reboot or hard restart.